Cryptographic Algorithms Implementation on RISC Processor
Y.Shekar1, B.Vasunayak2, J.Sunil Kumar3, A.Sanyasi Rao4, Fathima Shireen5
1Y.Shekar, Department of E.C.E, Ganapathy Engineering College, Warangal, Andhra Pradesh, India.
2B.Vasunayak, Department of E.C.E, Ganapathy Engineering College, Warangal, Andhra Pradesh, India.
3J.Sunil Kumar, Department of E.C.E, Ganapathy Engineering College, Warangal, Andhra Pradesh, India.
4A.Sanyasi Rao, Department of E.C.E, BIES, Warangal, Andhra Pradesh, India.
5Fathima Shireen, Department of E.C.E, SREC, Warangal, Andhra Pradesh, India.
Manuscript received on October 24, 2013. | Revised Manuscript Received on November 05, 2013. | Manuscript published on November 20, 2013. | PP: 4-8 | Volume-1, Issue-12, November 2013.
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© The Authors. Published By: Blue Eyes Intelligence Engineering & Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: —Security is one of the most important features in data communication. Cryptographic algorithms are mainly used for this purpose to obtain confidentiality and integrity of data in communication. Implementing a cryptographic algorithm on a general purpose processor it results lower throughput and larger power consumption. In this work we propose processor architecture to perform the cryptographic algorithms and also it speed up the encryption and decryption process of data. This processor will perform the cryptographic operations as like general instructions in GPP. The data size of this processor is 32- bit. The architecture of the processor designed using Verilog HDL
Keywords: Cryptographic Algorithms, GPP, Verilog.